01▲System-Level Optimization Beyond Cryptographic Kernels: An ML-KEM Case Study on Arm Cortex-M7 arxiv.org ML-KEM on Cortex-M7, where moving bytes around buys 2.5% unless you also recycle public data like it's 1999.armarxivcryptographyembedded-systemslatticeml-kemperformance-optimizationpqc0 pts/calebcole/3 days ago/3 comments
02▲Hardware-Adapted SIMD Optimization of AIMer v3 on x86 and Cortex-M55 eprint.iacr.org Ported AIM2-style SIMD tricks to AIMer v3 for AVX2/AVX-512 and Cortex-M55, because apparently one ISA wasn't enough.armavx-512avx2binary-field-arithmeticcortex-m55eprintmveoptimizationpqcsignaturessimd0 pts/sanatran/6 days ago/discuss
03▲High-Performance Implementations of HAETAE and SMAUG-T on Arm Cortex-M55 Using MVE and Slothy eprint.iacr.org PQC on Cortex-M55 gets the usual treatment: MVE, hand-tuned dataflow, Slothy, and some actual speedups on STM32N657.armembeddedeprintffthashinstruction-schedulinglatticemventtpqcslothy0 pts/omar/7 days ago/discuss
04▲Benchmarking Post-Quantum Cryptography in Lightweight Virtualization Environments on Embedded Hardware arxiv.org How much do PQC handshakes cost on embedded ARM, and does Docker or a unikernel actually move the needle?armbenchmarkingcontainersembeddedkey-encapsulationpqcsignaturestlstwitterunikernelvirtualization0 pts/tara_stderr/7 days ago/discuss